LEAD FPGA DESIGN ENGINEER San Diego, CA 165-225K + Bonus + Paid Relocation
Job Description: This self-motivated individual will help lead a team to develop FPGA Firmware in the Space & Airborne Systems (SAS) Segment. The SAS Segment provides critical mission solutions for space and airborne domains with defense, intelligence, and commercial applications. As an FPGA design engineer, you will be directly involved in the design, integration, and test of advanced satellite communication links, digital telemetry, signal processing, and encryption technology.
The Lead FPGA Engineer will perform the following:
Support proposal efforts in the estimation and planning of end-to-end FPGA development.
Decompose and allocate system and box-level requirements to FPGA requirements and specifications.
Architect solutions against requirements and implement those solutions in various FPGA technologies or platforms.
Lead small teams of engineers in executing FPGA development of highly reliable and robust FPGA designs.
Follow, enforce, and refine consistent firmware development processes across FPGA designs.
Develop HDL code for module and top level and generate appropriate testbench and verification environments.
Map FPGA simulation work products to system-level requirements and capabilities.
Synthesize designs to targeted technologies and perform constraint driven place and route and analysis.
Develop FPGA simulations to verify performance and requirements, then integrate and test the FPGA on the circuit card assembly.
Present and review technical designs internally and customer facing.
BS degree in Electrical/Computer Engineering and 9 or more years of professional experience with firmware development, or a Graduate Degree with a minimum of 7 years relevant firmware experience
Active Top Secret or Secret clearance
Experience with VHDL, the FPGA design process, and the tools used to design and verify FPGA designs
Experience building FPGAs with difficult timing and/or difficult routing constraints
Experience with standard lab equipment, including oscilloscopes, logic analyzers, and signal generators
Experience or familiarity with NSA approved crypto designs
Experience with UVM and System Verilog
Preferred Additional Skills:
Experience with digital encryption schemes, HAIPE experience a plus
Experience with 1553B, SpaceWire, XAUI, JESD204, I2C, SPI interfaces
Experience with implementing Ethernet
Experience with Xilinx and Microsemi development tools